Nanoelectronic devices are generally fabricated on semiconductor substrates as integrated circuits. A complementary metal-oxide-semiconductor (CMOS) field effect transistor is one of the core elements of the integrated circuits. Dimensions and operating voltages of CMOS transistors are continuously reduced, or scaled down, to obtain ever-higher performance and packaging density of the integrated circuits.
One of the problems due to the scaling down of CMOS transistors is that the power consumption keeps increasing. This is partly because leakage currents are increasing (e.g. due to short channel effects) and because it becomes difficult to decrease the supply voltage. The latter is mainly due to the fact that the subthreshold swing is limited to minimally about 60 mV/decade, such that switching the transistor from ON to OFF needs a certain voltage variation and therefore a minimum supply voltage.
Tunnel field-effect transistors (TFETs) are typically advertised as successors of metal-oxide semiconductor field-effect transistors (MOSFETs), because of their absence of short-channel effects and because of their resulting low off-currents. Another advantage of TFETs is that the subthreshold swing can theoretically be less than 60 mV/dec, the physical limit of conventional MOSFETs, however in practice this has not been achieved with current TFETs.
There is a further need for improvement of TFET design and TFET device performance.